TMP91FY27 2003-07-03 91fy27-4 2. pin assignment and pin functions the assignment of input/output pins for the TMP91FY27u, their names and functions are as follows: 2.1 pin assignment diagram figure 2.1.1 shows the pin assignment of the TMP91FY27u. figure 2.1.1 pin assignment diagram (64-pin lqfp) p61/so/sda 57 p62/si/scl 58 p63/int0 59 p50/an0 60 p51/an1 61 p52/an2 62 p53/an3/ adtrg 63 avcc 64 top view lqfp64 56 p60/sck 55 p42/ cs2 54 p41/ cs1 53 p40/ cs0 52 p32/ hwr 51 p31/ wr 50 p30/ rd / boot 49 p25/a5/a21 avss 1 p70/ta0in 2 p71/ta1out 3 p72/ta3out 4 p73/ta4in 5 p74/ta5out 6 p80/tb0in0/int5 7 p81/tb0in1/int6 8 p82/tb0out0 9 p83/tb0out1 10 p90/txd0 11 p91/rxd0 12 p92/sclk0/ cts0 13 p93/txd1 14 p94/rxd1 15 p95/sclk1/ cts1 16 am0 17 dvcc 18 x2 19 dvss 20 x1 21 am1 22 reset 23 p96/xt1 24 32 p04/ad4 31 p03/ad3 30 p02/ad2 29 p01/ad1 28 p00/ad0 27 ale 26 nmi 25 p97/xt2 48 p24/a4/a20 47 p23/a3/a19 46 p22/a2/a18 45 p21/a1/a17 44 p20/a0/a16 43 p17/ad15/a15 42 p16/ad14/a14 41 p15/ad13/a13 40 p14/ad12/a12 39 p13/ad11/a11 38 p12/ad10/a10 37 p11/ad9/a9 36 p10/ad8/a8 35 p07/ad7 34 p06/ad6 33 p05/ad5
TMP91FY27 2003-07-03 91fy27-5 2.2 pin names and functions the names of the input/output pins and their functions are described below. table 2.2.1 and table 2.2.2 show pin names and functions. table 2.2.1 pin names and functions (1/2) pin names number of pins i/o functions p00 to p07 ad0 to ad7 8 i/o i/o port 0: i/o port that allows i/o to be selected at the bit level address data (lower): 0 to 7 of address/data bus p10 to p17 ad8 to ad15 a8 to a15 8 i/o i/o output port1: i/o port that allows i/o to be selected at the bit level address data (upper): 8 to 15 of address/data bus address: 8 to 15 of address bus p20 to p25 a0 to a5 a16 to a21 6 i/o output output port 2: i/o port that allows i/o to be selected at the bit level address: 0 to 5 of address bus address: 16 to 21 of address bus p30 rd boot 1 output output input port 30: output port read: strobe signal for reading external memory when read internal area also, output rd by setting to p3 0 and p3fc 1. this pin sets single boot mode (only during reset). for the details, please refer to section 3.1, ?outline of operation mode?. p31 wr 1 output output port 31: output port write: strobe signal for writing data to pins ad0 to ad7 p32 hwr 1 i/o output port 32: i/o port (with pull-up resistor) high write: strobe signal for writing data to pins ad8 to ad15 p40 cs0 1 i/o output port 40: i/o port (with pull-up resistor) chip select 0: outputs ?0? when address is within specified address area. p41 cs1 1 i/o output port41: i/o port (with pull-up resistor) chip select 1: outputs ?0? when address is within specified address area. p42 cs2 1 i/o output port 42: i/o port (with pull-up resistor) chip select 2: outputs ?0? when address is within specified address area. p50 to p53 an0 to an3 adtrg 4 input input input port 5: input port analog input: analog input pins of the ad converter ad trigger: pin used to request ad start (shared with p53). p60 sck 1 i/o i/o port 60: i/o port serial bus interface clock i/o at sio mode p61 so sda 1 i/o output i/o port 61: i/o port serial bus interface send data at sio mode serial bus interface send/receive data at i 2 c mode open-drain output mode by programmable p62 si scl 1 i/o input i/o port 62: i/o port serial bus interface receive data at sio mode serial bus interface clock i/o at i 2 c mode open-drain output mode by programmable p63 int0 1 i/o input port 63: i/o port (schmitt input) interrupt request pin 0: interrupt request pin with level/ rising/falling edge p70 ta0in 1 i/o input port 70: i/o port 8-bit timer 0 input: input pin of 8-bit timer tmra0 p71 ta1out 1 i/o output port 71: i/o port 8-bit timer 1 output: output pin of 8-bit timer tmra0 or tmra1 p72 ta3out 1 i/o output port 72: i/o port 8-bit timer 3 output: output pin of 8-bit timer tmra2 or tmra3
TMP91FY27 2003-07-03 91fy27-6 table 2.2.2 pin names and functions (2/2) pin names number of pins i/o functions p73 ta4in 1 i/o input port 73: i/o port 8-bit timer 4 input: input pin of 8-bit timer tmra4 p74 ta5out 1 i/o output port 74: i/o port 8-bit timer 5 output: output pin of 8-bit timer tmra4 or tmra5 p80 tb0in0 int5 1 i/o input input port 80: i/o port 16-bit timer 0 input 0: input of count/capture trigger in 16-bit timer tmrb0 interrupt request pin 5: interrupt request pin with selectable rising/falling edge p81 tb0in1 int6 1 i/o input input port 81: i/o port 16-bit timer 0 input 1: input of count/capture trigger in 16-bit timer tmrb0 interrupt request pin 6: interrupt request pin of rising edge p82 tb0out0 1 i/o output port 82: i/o port 16-bit timer 0 output 0: outpit pin of 16-bit timer tmrb0 p83 tb0out1 1 i/o output port 83: i/o port 16-bit timer 0 output 1: output pin of 16-bit timer tmrb0 p90 txd0 1 i/o output port 90: i/o port serial 0 send data: open-drain output pin by programmable p91 rxd0 1 i/o input port 91: i/o port serial 0 receive data p92 sclk0 cts0 1 i/o i/o input port 92: i/o port serial 0 clock i/o serial 0 data send enable (clear to send) p93 txd1 1 i/o output port 93: i/o port serial 1 send data: open-drain output pin by programmable p94 rxd1 1 i/o input port 94: i/o port serial 1 receive data p95 sclk1 cts1 1 i/o i/o input port 95: i/o port serial 1 clock i/o serial 1 data send enable (clear to send) p96 xt1 1 i/o input port 96: i/o port. open-drain output pin. low frequency oscillator connection pin p97 xt2 1 i/o output port 97: i/o port. open-drain output pin. low frequency oscillator connection pin ale 1 output address latch enable (it can be set as prohibition of an output for noize reduction.) nmi 1 input non-maskable interrupt request pin: interrupt request pin with programmable falling edge level or with both edge levels programmable (schmitt input). am0 and am1 2 input operation mode: fixed to am1 ?1? and am0 ?1?. reset 1 input reset: initialize lsi. (schmitt input, with pull-up resistor) avcc 1 pin used to both power supply pin for ad converter and standard power supply for ad converter (h). avss 1 pin used to both gnd pin for ad converter (0 v) and standard power supply pin for ad converter (l). x1/x2 2 i/o high frequency oscillator connection pin. dvcc dvss 1 1 power supply pins (all dvcc pins should be connected with the power supply pin). gnd pins (all pins shuold be connected with gnd(0v).)
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